– Read chapter 8 of the book “Embedded SoPC Design With Nios® II Processor And VHDL Examples”. The chapter gives an overview of the Nios® II processor features. The Nios® II processor is intelectual property ( IP ) of Altera. Usually the Nios® II is implemented in VHDL codes to be programmed into a configurable logic circuit device, such as an FPGA, and therefore it is a soft core processor in contrast to a transistor level hard core processor.
– Started the tutorial in chapter 9 of the book “Embedded SoPC Design With Nios® II Processor And VHDL Examples”. Had some problems due to differences in the interfaces of the software installed in the laboratory computer and the tutorial in the book. The book shows the SoPC builder tool, and the software in the laboratory has the QSys. The SoPC builder tool and QSys are similar, but their interfaces are different.
Sorry, I didn’t understood your comment.