Project Title : Design, Simulation and Implementation of a prototype SoC to Recognize an Object Through Image Processing.
System on a Chip (SoC) approach to chip design.
This Computer Engineering project – an investment of time and effort – consists of configuring a re-configurable logic circuit device to behave as an image processor. The re-configurable logic circuit device will host the entire image processor, and hence the re-configurable logic circuit device will become a System on a Chip (SoC).
The first re-configurable logic circuit device considered will be a Field Programmable Gate Array (FPGA) due to its accessibility. In a first contact, the Cyclone series FPGA from Altera® is our choice to use as FPGA in the project.
In order to configure the FPGA to simulate / emulate an image processor, first it is needed to choose one image processor. At this moment the Nios II processor from Altera® is our choice to use as base for the configuration of the FPGA.
The main motivations for the project are:
- The SoC and CSoC approachs to design are promising in many aspects when compared to the classic Application Specific Integrated Circuit (asIC) design and the newer System in Package (SiP) design. A tendency is emerging in the industry and academia to move towards SoC design as it is promising, and the main aspects in which the SoC approach shows promise are : energy efficiency, packaging cost, reliability of the integrated circuit, usage life, fabrication cost (cost of a single chip) and time to market. The main counter part is the Non Recurring Engineering (NRE) cost, which is the cost of designing a SoC. Although, as tools and the community develop it is expected that the NRE cost will gradually become smaller.
- Experiment a SoC approach to chip design. The knowledge acquired with the design, simulation and implementation of a SoC prototype will help in the creation of a course for chip design with a SoC approach in the future at Union College.
The major goals of the project are:
- Acquire knowledge with the design tools used in CSoC design.
- Develop concise documentation for the process that is found to be most efficient for these tools.
- Implement a fully working prototype CSoC to interface a sensor for image processing.
- Develop a report that documents the prototype.
The following steps will be followed to achieve the goals:
- Estimate the requirements for the proposed image detection system. This step is important to gauge if the current CSoC equipment we have will be sufficient to design and build the proposed prototype. If needed, other parts and devices will be ordered.
- Select a development environment. At this moment we propose to work with an Altera cyclone FPGA (which has a Nios II processor that can be configured and embedded), a DE2 development board, and the Quartus II development environment. This step includes research about the usual approaches to CSoC design, the Quarthus II development kit, the DE2 development board and the Altera® Cyclone FPGA to see if they will be appropriate for the proposed system. Alternative development environments will also be researched to develop a survey paper on current CSoC design options.
- Understand the design tools. On-line tutorials and other documentation will be gathered to understand the CSoC design flow.
- Implement the prototype. After the prototype finalization, then the camera system will be developed.
- Research camera options to find one that will connect easily to the CSoC and has a manageable interface. Ordering the camera.
- Test and debugging the prototype.
- Document the knowledge gained with the design tools.
- Document the proposed system and prototype.
