Daily Update – Day 10

Posted by on Jun 29, 2014 in Development History | 4 comments

– Experimented in the Eclipse IDE for software development to a Nios® II soft core processor. Some of the experiments were:

  • File creation. Which files are created upon project creation and compilation, when they are created, what is the purpose of each file.
  • Interface navigation.
  • Effects of settings on the IDE interface and in the software development.

– Watched online tutorials for software development in the Eclipse IDE:

  • “Hello World on your FPGA”. This tutorial shows how to print a “hello world” message on the LCD screen of the FPGA through programming in VHDL for a simple Nios® II soft core processor designed with the SOPC builder. Link for this tutorial : https://www.youtube.com/watch?v=gBknFw511s0&list=LL48speL6HPyLooIqQOEFQ4Q&index=3
  • “My First Nios II tutorial part 1”. This tutorial shows how to design a simple Nios® II soft core processor with the SOPC builder software and download it into an FPGA. The tutorial is helpful because the SOPC builder software and the Qsys software installed in the laboratory computer are similar . Link for this tutorial : https://www.youtube.com/watch?v=DBkza5-SlqQ
  • “My first Nios II part 2”. This tutorial shows how to develop code for a simple Nios® II soft core processor and download the code in the FPGA configured with the simple Nios® II. The template code for the “hello word” message is altered to blink some LEDs on the FPGA and then downloaded into the on-chip memory of the Nios® II soft core processor within the FPGA.

4 Comments

  1. It is good that you got to the point of programming the processor to interact with the hardware on the DE2 board.
    I would like to learn more about the memory associated with the processor, and the memory available on the FPGA, and how we might use these.

    • Ok, tomorrow we can talk about the memory in the Nios II and in the FPGA.

  2. It’s amazing to go to see this website and reading the views of all colleagues concerning this paragraph, while I am
    also eager of getting experience.

  3. I’m curious about the processor’s memory, as well as the FPGA’s memory, and how we may put it to use.
    Comment *It’s great that you’ve gotten the CPU working with the DE2 board’s hardware through programming.
    stumble guys

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