The activities listed were done during the night
– Figured out the details to get the audio demonstration in the system working on the DE1-SoC board.
– Tried reverse engineering to understand the demonstration, specially the hardware. Most of the time was spent in this item.
– Emailed Terasic support regarding difficulties with writing code for a custom Nios® II soft core processor in the Eclipse Software Build Tools.
– Found good documentation on:
- Designing a custom system with the Qsys.
- Writing code for a custom system in the Eclipse Software Build Tools.
– Started reading the documentation, specially about the components at disposal in the Qsys.
Comments:
- I’m starting to feel the need of knowing Verilog or VHDL to understand better the examples / tutorials. These hard description languages are preferred by designers than a block design, specially in larger systems.
- Although we have a hard core processor embedded in the board, i still haven’t seen any example using it. Maybe it’s used in more advanced applications.
- I am having difficulties writing code for custom Nios II. Although i’m familiar with C language, i still have to understand the custom libraries and specifics of programming in the Eclipse Software Build Tools.
- The audio demonstration shouldn’t be a first example in a course in SoC design and development. That because it is too complicated, a more simple example should be used as model in my opinion.
– Updated the project goals after speaking with supervisor Cherrice Traver.
