Daily Update – Day 19

Posted by on Jul 11, 2014 in Development History | 0 comments

– Went through the tutorial “Verilog In One Day”. Link for the tutorial : http://www.asic-world.com/verilog/verilog_one_day.html

Still there is a part of the Audio demonstration top level Verilog file that is unclear to me.

– Continued the reverse engineering on the audio demonstration software implement in the Eclipse Software Build Tools.

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