Daily Update – Day 23

Posted by on Jul 16, 2014 in Development History | Comments Off on Daily Update – Day 23

– Continued with the reverse engineering in the Audio demonstration C code. Almost finished !!!

– Read some more about Verilog Hardware Description Language in order to understand the bottom section of the Top level design file ( the Verilog file created by the Qsys® ) in Quarthus® II.

 

Comments:

 

  • I have to document very well the research done in the C code.
  • The relation between hardware and software is fundamental to completely understand the C code.
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