Daily Update – Day 20
– Continued the reverse engineering on the Audio demonstration software. Advanced a few functions in the C code.
Saturday
No work was done
Sunday
– Started reading the CODEC datasheet. The CODEC applies Analogical to Digital and Digital to Analogical conversion in order to compress and decompress audio data. It also has filters that can be configured to operate on the input signal. Found the registers used to configure the CODEC. The CODEC present in the FPGA is the [ WM8731 Portable Internet Audio CODEC with Headphone Driver and Programmable Sample Rates].
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Daily Update – Day 19
– Went through the tutorial “Verilog In One Day”. Link for the tutorial : http://www.asic-world.com/verilog/verilog_one_day.html
Still there is a part of the Audio demonstration top level Verilog file that is unclear to me.
– Continued the reverse engineering on the audio demonstration software implement in the Eclipse Software Build Tools.
Read MoreDaily Update – Day 18
– Got a cable for audio data transfer from supervisor Cherrice Traver. Thank you for the cable.
– Executed successfully the audio demonstration in the DE1-Soc board User Manual.
– Started learning Verilog / VHDL in order to understand better the top level design files in most tutorials / examples about the Quarthus® II software.
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Daily Update – Day 17
The activities listed were done during the night
– Figured out the details to get the audio demonstration in the system working on the DE1-SoC board.
– Tried reverse engineering to understand the demonstration, specially the hardware. Most of the time was spent in this item.
– Emailed Terasic support regarding difficulties with writing code for a custom Nios® II soft core processor in the Eclipse Software Build Tools.
– Found good documentation on:
- Designing a custom system with the Qsys.
- Writing code for a custom system in the Eclipse Software Build Tools.
– Started reading the documentation, specially about the components at disposal in the Qsys.
Comments:
- I’m starting to feel the need of knowing Verilog or VHDL to understand better the examples / tutorials. These hard description languages are preferred by designers than a block design, specially in larger systems.
- Although we have a hard core processor embedded in the board, i still haven’t seen any example using it. Maybe it’s used in more advanced applications.
- I am having difficulties writing code for custom Nios II. Although i’m familiar with C language, i still have to understand the custom libraries and specifics of programming in the Eclipse Software Build Tools.
- The audio demonstration shouldn’t be a first example in a course in SoC design and development. That because it is too complicated, a more simple example should be used as model in my opinion.
– Updated the project goals after speaking with supervisor Cherrice Traver.
Read MoreDaily Update – Day 16
– Started reading the User Manual of the DE1-SoC board. Read from page 1 to page 47. The manual has 113 pages. Important notes about the board:
- The Cyclone® V FPGA can be configured in 2 ways. The first one is through a JTAG connection and is volatile. This is the type of programming used by the Quarthus® II Programmer software through the USB Blaster II. The second one is through an Active Serial connection and is not volatile. The configuration is stored in the quad serial configuration device ( EPCQ ) integrated circuit in the board, which seems to be a flash memory.
- LEDs are used to signal if data is being received or transmitted in the board. For example, when programming the FPGA with a JTAG connection via Quarthus® II Programmer, an LED close to the USB-Blaster II jack is lit.
- The clock master source frequency is 25 MHz.
- The board seems to be active in low logic level.
- The working voltage level in the FPGA is 3.3 V ( standard ).
- The 4 push buttons are debounced, and the 10 slide switches are not. The slide switches are connected directly to the FPGA.
- A COmpresser / DECompresser ( CODEC ) is used in order to process audio data faster inside the FPGA. The CODEC present in the board is the WM8731 integrated circuit.
- A video DAC is used to create an analogical video output from the FPGA to the VGA port in the board. The DAC is a triple 10 bit video DAC 3 outputs represents three fundamental colors: Red, Green and Blue. Only the 8 higher bits of each output are used.
